Experts from both sides bring complete high-speed serial channel solutions from channel emulation to testing Beijing, China - February 24, 2011 - Tektronix, a global leader in the oscilloscope market, has announced that it will work with ANSYS to hold high-speed strings. Designing a joint seminar from software simulation to hardware testing helps high-speed digital system R&D workers to meet increasingly stringent design challenges, improve product performance, and accelerate development cycles. The seminar will be held in Taipei (March 8th), Beijing (March 10th), Shanghai (March 15th) and Shenzhen (March 17th). Engineers who are interested in attending the seminar are welcome to log in : . Com. Cn/event/BERT-ANSYS/ to register.
In the standard flow of modern high-speed design, accurate model and software simulation are needed to guide the design to reduce errors. At the same time, after the initial establishment of the prototype, it must continue to be verified by hardware measurements. It is the expectation of each SI and R&D engineer that the simulation environment is as close to the real environment as possible. With the increase of data transmission rate on PCB boards and backplanes, the requirements for PCB traces have become higher and higher. How to ensure the continuity of the impedance on the signal transmission path, so as to prevent the signal from generating a large reflection becomes crucial.
The design platform formed by ANSYS's high-speed signal simulation software and Tektronix test instrument can realize the complete closed loop of “Design—>Simulation—>Prototype Prototype Test—>Redesign Simulationâ€, which brings about great mutual authentication for test and simulation. The convenience. Tektronix TDR and S-parameter tests help visualize signal trace quality. IConnect software models and extracts the entire signal interconnect as a reference for modeling the circuit during the design phase and optimizes it. At the seminar, test and measurement experts from Tektronix and ANSYS will give detailed introductions to these practical issues and build a live environment for live demonstrations.
In addition, in order to challenge the closed eye diagram, Tektronix will also introduce its BERTScope® in the use of high-speed backplane and cable testing. The BERTScope includes code generation, pre-emphasis modules, bit error rate testing, clock recovery, and oscilloscope functions, providing an excellent test solution for high-count backplane and connector design and measurement.
Seminar time and place:
Taipei, March 8, 2011, Victoria Hotel, Victoria Plaza, 3rd Floor, Ballroom C, 104, Jingye Road, No. 168, Zhongshan District, Taipei, Beijing, March 10, 2011, 3rd Floor, Beijing Lucky Plaza Huayuan Hotel, Haidian District, Beijing Zhichun Road No. 25, Shanghai March 15, 2011, Ballroom, 3rd Floor, Shanghai Ancient Elephant Hotel, 595 Jiujiang Road, Shenzhen, Shenzhen, China March 17, 2011, 8th Floor, Marco Polo Shenzhen, Sydney, China Fuhua First Road, Futian Central District, Shenzhen
In the standard flow of modern high-speed design, accurate model and software simulation are needed to guide the design to reduce errors. At the same time, after the initial establishment of the prototype, it must continue to be verified by hardware measurements. It is the expectation of each SI and R&D engineer that the simulation environment is as close to the real environment as possible. With the increase of data transmission rate on PCB boards and backplanes, the requirements for PCB traces have become higher and higher. How to ensure the continuity of the impedance on the signal transmission path, so as to prevent the signal from generating a large reflection becomes crucial.
The design platform formed by ANSYS's high-speed signal simulation software and Tektronix test instrument can realize the complete closed loop of “Design—>Simulation—>Prototype Prototype Test—>Redesign Simulationâ€, which brings about great mutual authentication for test and simulation. The convenience. Tektronix TDR and S-parameter tests help visualize signal trace quality. IConnect software models and extracts the entire signal interconnect as a reference for modeling the circuit during the design phase and optimizes it. At the seminar, test and measurement experts from Tektronix and ANSYS will give detailed introductions to these practical issues and build a live environment for live demonstrations.
In addition, in order to challenge the closed eye diagram, Tektronix will also introduce its BERTScope® in the use of high-speed backplane and cable testing. The BERTScope includes code generation, pre-emphasis modules, bit error rate testing, clock recovery, and oscilloscope functions, providing an excellent test solution for high-count backplane and connector design and measurement.
Seminar time and place:
Taipei, March 8, 2011, Victoria Hotel, Victoria Plaza, 3rd Floor, Ballroom C, 104, Jingye Road, No. 168, Zhongshan District, Taipei, Beijing, March 10, 2011, 3rd Floor, Beijing Lucky Plaza Huayuan Hotel, Haidian District, Beijing Zhichun Road No. 25, Shanghai March 15, 2011, Ballroom, 3rd Floor, Shanghai Ancient Elephant Hotel, 595 Jiujiang Road, Shenzhen, Shenzhen, China March 17, 2011, 8th Floor, Marco Polo Shenzhen, Sydney, China Fuhua First Road, Futian Central District, Shenzhen
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