The computer architecture in the multi-core era is facing a complete redesign

A study by the National Science Foundation believes that today's multi-core processors require better ways to program. A researcher at the University of Maryland stated in the January issue of the American Computer Association’s flagship newsletter that in order to effectively use multi-core processors, the IT industry needs to thoroughly rethink the basic computer architecture that it has used for more than 50 years.

Uzi Vishkin, a professor at the Advanced Computer Research Institute at the University of Maryland, said in the paper: "The recent large-scale migration from a single-processor computer system to a multi-processor parallel system requires many aspects of computer science to establish and program new systems. Transformation."

Vishkin even provided an abstract diagram of the new architecture. He called it ICE (Instant Parallel Execution). He used the funds provided by the National Science Foundation to develop ICE.

The basic computer architecture we use today is based on the concepts proposed by John von Neumann in the 1940s. In his architecture, data and programs are stored in computer memory and fed to the computer's CPU. The program is executed by using a program counter, which provides the CPU with the address of the next instruction to be executed in the memory.

This method allows what Vishkin calls a serial calculation. In this design, "any single instruction that can be executed in a serial program can be executed immediately."

However, it is restricted because it allows only one single instruction at a time. Vishkin said that in the era of multi-core processors and having a large amount of available memory, this restriction is no longer needed. Instead, multiple instructions can usually be executed in parallel faster - all instructions are executed simultaneously and in one step.

The alternative to Vishkin is different from the von Neumann architecture, which allows an infinite number of instructions to be executed at any given time, which greatly simplifies the programmer's job. He said that with ICE, "you can imagine any number of instructions, as long as the input of one instruction is not the output of another instruction." Programmers no longer need to worry about how many processors are available for this task.

Vishkin said that this architecture requires changes to the hardware design. As for the operation mode, the chip may need to establish a high-bandwidth, low-latency network between the processor and the memory. Hardware requires a single processor core to control all other cores. If the code is serial, it can be executed on that core. If there are other instructions, the central processor may send other instructions to other cores.

Vishkin owns six patents for this technology and the research team has also established prototype hardware that can run on the ICE abstraction architecture.

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