The DS24B33 is an alternative to the DS2433 with newer semiconductor technology. In general, the DS24B33 is pin-compatible with the DS2433 and can directly replace the DS2433; both devices have a 1-Wire interface and 4Kb EEPROM, and the EEPROM is divided into 16 pages of 32 bytes each. However, next-generation semiconductor technology has caused some inevitable changes in performance, characteristics, and operating conditions. Changes in performance and characteristics do not necessarily adversely affect existing designs using the DS24B33. This article discusses in detail the impact of these changes and helps designers assess whether these changes are an obstacle to existing designs. This paper analyzes the parameter changes and gives suggestions for modifying existing designs.
Performance and Characteristic Changes Read Operation Low Duration Description: This parameter specifies the duration that the master device must pull 1-Wire low at the beginning of a read time slot. This duration must be long enough until the 1-Wire slave responds to the bus with a logic 0, pulling the bus low.
Excerpt from DS2433 data sheet
| SYMBOL | CONDITIONS | MIN | TYP | MAX | UNITS | NOTES |
| tLOWR | Standard speed | 1 | 15 | Ss | 8 | |
| Overdrive speed | 1 | 2 |
| Note 8: | The low-level pulse duration of the master device is at least 1μs, and the maximum value should be as small as possible, so that the pull-up resistor can be sampled before the 1-Wire device (write 1 time) or before the master device samples (read 1 time) Take over the bus. |
Excerpt from DS24B33 data sheet
| SYMBOL | CONDITIONS | MIN | TYP | MAX | UNITS | NOTES |
| tRL | Standard speed | 5 | 15-δ | Ss | 2, 17 | |
| Overdrive speed | 1 | 2-δ |
| Note 2: | System Requirements. |
| Note 17: | δ represents the time required for the pull-up circuit to pull the IO voltage from VIL to the bus master input high-level threshold. The actual maximum duration that the host controller pulls the bus low is tRLMAX + tF. |
Impact: At standard speeds, low-pass filtering is added to the 1-Wire front end to improve network performance, which also increases response time without affecting the maximum metric limit. In order to ensure the correct mathematical calculation, the introduction of "δ" represents the upper limit, which is related to the rise time of the actual application. Note that the improvement in network performance also affects the minimum of the low-level duration (tLOW1 and tW1L, respectively) for "write 1", the minimum value of DS24B33 is 5μs, and the DS2433 is 1μs. Typically, the primary controller generates a read data slot in the same manner as a "write 1" time slot. Therefore, updating the firmware to meet the tRL requirement of the DS24B33 is the timing to update the "write 1" time slot in the correct manner.
Action: Verify that the 1-Wire master meets the DS24B33 requirements. If the lower limit is not met, the master device may stop pulling the bus low before the slave pulls the bus low, creating a spike on the 1-Wire signal line. In a network of multiple slave devices, spikes can cause other slave devices to lose synchronization with the master device. In the case of a single-point network, this potential spike is less likely to affect communication.
Recovery Time Description: This parameter specifies the minimum idle time (high time) between the time slots of the 1-Wire slave to recover its parasitic power supply and ready for the next operation (slot or reset/online detection). The duration must be sufficient to supplement the energy consumed by the previous operation and accumulate energy for the next operation. Since the reset/on-line detection process is greater than one time slot, the parasitic power supply must be fully charged so that the device generates an acknowledge pulse that satisfies the timing specification. The recovery time affects the effective 1-Wire data rate at a data rate of 1/tSLOT. Note that the slot definition for the DS2433 data sheet does not include recovery time.
Excerpt from DS2433 data sheet
| SYMBOL | CONDITIONS | MIN | TYP | MAX | UNITS | NOTES |
| tREC | Standard speed | 1 | Ss | |||
| Overdrive speed | 1 |
Excerpt from DS24B33 data sheet
| SYMBOL | CONDITIONS | MIN | TYP | MAX | UNITS | NOTES |
| tREC | Standard speed | 5 | Ss | 2, 13 | ||
| Overdrive speed | 2 | |||||
| VPUP ≥ 4.5V | 1 | |||||
| Directly prior to reset pulse ≤ 640μs | 5 | |||||
| Directly prior to reset pulse > 640μs | 10 |
| Note 2: | System Requirements. |
| Note 13: | The 1-Wire bus is attached to a single DS24B33. |
Impact: The DS2433 data sheet does not describe the parameter test conditions. If the recovery time in the application is too short, writing a 0-slot will cause the 1-Wire slave to "power down" and lose synchronization with the master. When the power supply voltage is insufficient, the timing specifications associated with the slave device (ie, not the system requirements) may not be met, resulting in unreliable operation.
Action: Verify that the 1-Wire master meets the DS24B33 requirements. Note that a maximum 2.2kΩ pull-up resistor is required in the data sheet and is a single slave network. For networks with multiple slaves, recovery time is longer. If the pull-up resistor in the application is greater than 2.2kΩ, replace the resistor. See the recommended values ​​for the pull-up resistor section of this document. For more guidance, see application note 3829, "Determining Recovery Times for Multi-Slave 1-Wire® Networks."
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