The spread spectrum wireless communication standard IS-95/3GPP imposes strict requirements on linearity and adjacent channel power ratio (ACPR). To meet these standards, high-linearity Class A or Class AB RF power amplifiers are typically used in W-CDMA handsets. However, at an output power of +28 dBm, the power added efficiency (PAE) of such amplifiers rarely exceeds 35%. As the output power decreases, the PAE drops even further, making efficiency a critical challenge for mobile devices.
Power amplifiers do not always operate at full power. During voice calls, when the user is not speaking, the amplifier runs at half rate (50% duty cycle) or even 1/8 rate, which reduces heat generation. However, in data mode, the power amplifier remains active until the data transfer is complete. This continuous operation, combined with low efficiency, leads to rapid battery drain and potential overheating of the device.
In early W-CDMA handsets that supported high-speed data services, power consumption was a major design challenge. Engineers had to use larger batteries, more robust cooling systems, and better heat dissipation methods. Fortunately, recent advancements in power amplifier technology have significantly improved efficiency, reducing the need for excessive thermal management.
In CDMA and W-CDMA systems, the RF output power of the power amplifier is not always at its maximum. To optimize cellular capacity—how many users a base station can support simultaneously—each handset must adjust its RF output power so that the received signal-to-noise ratio is consistent across all devices.
Statistical data shows that the average RF output power of a standard CDMA or W-CDMA phone is around +10 dBm in suburban areas and +5 dBm in urban environments. Therefore, improving the power amplifier’s efficiency is more effective when targeting this mid-range power level rather than maximizing output.
CDMA and W-CDMA power amplifiers require two supply voltages: VREF, which biases the internal driver and power amplifier stages, and VCC, which biases the collector of these stages. By adjusting these voltages, designers can reduce the quiescent current and improve overall efficiency.
For example, when the RF transmit power is zero, the quiescent current is typically around 100 mA. Lowering VREF from 3V to 2.9V can reduce this current by approximately 20 mA. This adjustment helps maintain linearity and ACPR while minimizing power consumption.
Designers can also implement two-stage regulation of VREF, corresponding to low-power and high-power modes. This approach allows for efficient power management without compromising performance.
To adjust VREF, a low-power operational amplifier with high output current capability is often used. In most handsets, VCC is supplied directly from a single-cell Li-ion battery, ranging from 3.2V to 4.2V. Since power amplifiers typically operate between +5 dBm and +10 dBm, it's possible to reduce VCC without affecting linearity, thus lowering power consumption.
Experimental tests show that as long as the collector bias remains below 0.6V, normal communication with the base station can still be maintained. A variable bias voltage is provided to the power amplifier’s collector via a high-efficiency DC/DC buck converter. The baseband processor can control this voltage using a dedicated digital-to-analog converter (DAC).
The DC/DC converter must respond quickly to changes in the control signal, ideally reaching 90% of the new set voltage within 30 microseconds. It also uses high-frequency switching to minimize the size of the inductor.
Connecting a DC/DC converter between the power amplifier and the battery can create challenges at low battery voltages. To achieve +28 dBm RF output while maintaining linearity, a minimum VCC of 3.4V is recommended. At this voltage, the required power amplifier current is about 530 mA, and the PAE is around 35%.
At lower battery voltages, bypassing the DC/DC converter with a low Rds PFET can help maintain performance. This allows the battery voltage to directly power the collector in high-power mode, ensuring optimal use of available energy.
Optimizing PAE involves adjusting the collector bias voltage. While continuous adjustment offers the best results, it requires factory calibration and complex software. A practical alternative is stepwise adjustment, typically in two to four levels. For example, in a four-level system, VCC values might include Vbatt, 1.5V, 1V, and 0.6V. This method achieves efficiency comparable to continuous control, with minimal peak current demands on the inductor.
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